34 #include <uves_cpl_size.h>
35 #include <uves_propertylist.h>
36 #include <uves_utils_polynomial.h>
37 #include <uves_chip.h>
38 #include <uves_utils.h>
39 #include <uves_globals.h>
51 #define RAW_IMA "RAW_IMA"
52 #define FLAMES_SCI_RED "FIB_SCI_RED"
53 #define FLAMES_SCI_SIM_RED "FIB_SCI_SIM_RED"
54 #define FLAMES_SCI_COM_RED "FIB_SCI_COM_RED"
55 #define FLAMES_CORVEL_MASK "CORVEL_MASK"
57 #define FLAMES_INFO_TABLE(chip) ((chip) == UVES_CHIP_REDL ? "FIB_SCI_INFO_TAB_REDL" : \
58 (chip) == UVES_CHIP_REDU ? "FIB_SCI_INFO_TAB_REDU" : "???")
60 #define FLAMES_LINE_TABLE(chip) ((chip) == UVES_CHIP_REDL ? "FIB_LINE_TABLE_REDL" : \
61 (chip) == UVES_CHIP_REDU ? "FIB_LINE_TABLE_REDU" : "???")
63 #define FLAMES_LINE_TABLE_MIDAS(chip) ((chip) == UVES_CHIP_REDL ? "FIB_LINE_TABLE_REDL" : \
64 (chip) == UVES_CHIP_REDU ? "FIB_LINE_TABLE_REDU" : "???")
66 #define FLAMES_SLIT_FF_DT1(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_DT1_REDL" : \
67 (chip) == UVES_CHIP_REDU ? "SLIT_FF_DT1_REDU" : "???")
69 #define FLAMES_SLIT_FF_DT2(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_DT2_REDL" : \
70 (chip) == UVES_CHIP_REDU ? "SLIT_FF_DT2_REDU" : "???")
72 #define FLAMES_SLIT_FF_DT3(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_DT3_REDL" : \
73 (chip) == UVES_CHIP_REDU ? "SLIT_FF_DT3_REDU" : "???")
75 #define FLAMES_SLIT_FF_DTC(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_DTC_REDL" : \
76 (chip) == UVES_CHIP_REDU ? "SLIT_FF_DTC_REDU" : "???")
78 #define FLAMES_SLIT_FF_DT(it, chip) ((it) == 1 ? FLAMES_SLIT_FF_DT1(chip) : \
79 (it) == 2 ? FLAMES_SLIT_FF_DT2(chip) : \
80 (it) == 3 ? FLAMES_SLIT_FF_DT3(chip) : "???")
82 #define FLAMES_SLIT_FF_BP1(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_BP1_REDL" : \
83 (chip) == UVES_CHIP_REDU ? "SLIT_FF_BP1_REDU" : "???")
85 #define FLAMES_SLIT_FF_BP2(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_BP2_REDL" : \
86 (chip) == UVES_CHIP_REDU ? "SLIT_FF_BP2_REDU" : "???")
88 #define FLAMES_SLIT_FF_BP3(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_BP3_REDL" : \
89 (chip) == UVES_CHIP_REDU ? "SLIT_FF_BP3_REDU" : "???")
91 #define FLAMES_SLIT_FF_BPC(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_BPC_REDL" : \
92 (chip) == UVES_CHIP_REDU ? "SLIT_FF_BPC_REDU" : "???")
94 #define FLAMES_SLIT_FF_BP(it, chip) ((it) == 1 ? FLAMES_SLIT_FF_BP1(chip) : \
95 (it) == 2 ? FLAMES_SLIT_FF_BP2(chip) : \
96 (it) == 3 ? FLAMES_SLIT_FF_BP3(chip) : "???")
99 #define FLAMES_SLIT_FF_BN1(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_BN1_REDL" : \
100 (chip) == UVES_CHIP_REDU ? "SLIT_FF_BN1_REDU" : "???")
102 #define FLAMES_SLIT_FF_BN2(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_BN2_REDL" : \
103 (chip) == UVES_CHIP_REDU ? "SLIT_FF_BN2_REDU" : "???")
105 #define FLAMES_SLIT_FF_BN3(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_BN3_REDL" : \
106 (chip) == UVES_CHIP_REDU ? "SLIT_FF_BN3_REDU" : "???")
108 #define FLAMES_SLIT_FF_BN4(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_BN4_REDL" : \
109 (chip) == UVES_CHIP_REDU ? "SLIT_FF_BN4_REDU" : "???")
111 #define FLAMES_SLIT_FF_BNC(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_BNC_REDL" : \
112 (chip) == UVES_CHIP_REDU ? "SLIT_FF_BNC_REDU" : "???")
114 #define FLAMES_SLIT_FF_BN(it, chip) ((it) == 1 ? FLAMES_SLIT_FF_BN1(chip) : \
115 (it) == 2 ? FLAMES_SLIT_FF_BN2(chip) : \
116 (it) == 3 ? FLAMES_SLIT_FF_BN3(chip) : \
117 (it) == 4 ? FLAMES_SLIT_FF_BN4(chip) : "???")
120 #define FLAMES_SLIT_FF_SG1(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_SG1_REDL" : \
121 (chip) == UVES_CHIP_REDU ? "SLIT_FF_SG1_REDU" : "???")
123 #define FLAMES_SLIT_FF_SG2(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_SG2_REDL" : \
124 (chip) == UVES_CHIP_REDU ? "SLIT_FF_SG2_REDU" : "???")
126 #define FLAMES_SLIT_FF_SG3(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_SG3_REDL" : \
127 (chip) == UVES_CHIP_REDU ? "SLIT_FF_SG3_REDU" : "???")
129 #define FLAMES_SLIT_FF_SGC(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_SGC_REDL" : \
130 (chip) == UVES_CHIP_REDU ? "SLIT_FF_SGC_REDU" : "???")
133 #define FLAMES_SLIT_FF_SG(it, chip) ((it) == 1 ? FLAMES_SLIT_FF_SG1(chip) : \
134 (it) == 2 ? FLAMES_SLIT_FF_SG2(chip) : \
135 (it) == 3 ? FLAMES_SLIT_FF_SG3(chip) : "???")
137 #define FLAMES_SLIT_FF_COM(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_COM_REDL" : \
138 (chip) == UVES_CHIP_REDU ? "SLIT_FF_COM_REDU" : "???")
140 #define FLAMES_SLIT_FF_NOR(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_NOR_REDL" : \
141 (chip) == UVES_CHIP_REDU ? "SLIT_FF_NOR_REDU" : "???")
143 #define FLAMES_SLIT_FF_NSG(chip) ((chip) == UVES_CHIP_REDL ? "SLIT_FF_NSG_REDL" : \
144 (chip) == UVES_CHIP_REDU ? "SLIT_FF_NSG_REDU" : "???")
148 #define FLAMES_FIB_FF_DT1(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_DT1_REDL" : \
149 (chip) == UVES_CHIP_REDU ? "FIB_FF_DT1_REDU" : "???")
151 #define FLAMES_FIB_FF_DT2(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_DT2_REDL" : \
152 (chip) == UVES_CHIP_REDU ? "FIB_FF_DT2_REDU" : "???")
154 #define FLAMES_FIB_FF_DT3(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_DT3_REDL" : \
155 (chip) == UVES_CHIP_REDU ? "FIB_FF_DT3_REDU" : "???")
157 #define FLAMES_FIB_FF_DTC(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_DTC_REDL" : \
158 (chip) == UVES_CHIP_REDU ? "FIB_FF_DTC_REDU" : "???")
161 #define FLAMES_FIB_FF_DT(it, chip) ((it) == 1 ? FLAMES_FIB_FF_DT1(chip) : \
162 (it) == 2 ? FLAMES_FIB_FF_DT2(chip) : \
163 (it) == 3 ? FLAMES_FIB_FF_DT3(chip) : "???")
167 #define FLAMES_FIB_FF_BP1(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_BP1_REDL" : \
168 (chip) == UVES_CHIP_REDU ? "FIB_FF_BP1_REDU" : "???")
170 #define FLAMES_FIB_FF_BP2(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_BP2_REDL" : \
171 (chip) == UVES_CHIP_REDU ? "FIB_FF_BP2_REDU" : "???")
173 #define FLAMES_FIB_FF_BP3(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_BP3_REDL" : \
174 (chip) == UVES_CHIP_REDU ? "FIB_FF_BP3_REDU" : "???")
176 #define FLAMES_FIB_FF_BPC(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_BPC_REDL" : \
177 (chip) == UVES_CHIP_REDU ? "FIB_FF_BPC_REDU" : "???")
179 #define FLAMES_FIB_FF_BP(it, chip) ((it) == 1 ? FLAMES_FIB_FF_BP1(chip) : \
180 (it) == 2 ? FLAMES_FIB_FF_BP2(chip) : \
181 (it) == 3 ? FLAMES_FIB_FF_BP3(chip) : "???")
185 #define FLAMES_FIB_FF_BN1(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_BN1_REDL" : \
186 (chip) == UVES_CHIP_REDU ? "FIB_FF_BN1_REDU" : "???")
188 #define FLAMES_FIB_FF_BN2(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_BN2_REDL" : \
189 (chip) == UVES_CHIP_REDU ? "FIB_FF_BN2_REDU" : "???")
191 #define FLAMES_FIB_FF_BN3(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_BN3_REDL" : \
192 (chip) == UVES_CHIP_REDU ? "FIB_FF_BN3_REDU" : "???")
193 #define FLAMES_FIB_FF_BNC(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_BNC_REDL" : \
194 (chip) == UVES_CHIP_REDU ? "FIB_FF_BNC_REDU" : "???")
197 #define FLAMES_FIB_FF_SG1(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_SG1_REDL" : \
198 (chip) == UVES_CHIP_REDU ? "FIB_FF_SG1_REDU" : "???")
200 #define FLAMES_FIB_FF_SG2(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_SG2_REDL" : \
201 (chip) == UVES_CHIP_REDU ? "FIB_FF_SG2_REDU" : "???")
203 #define FLAMES_FIB_FF_SG3(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_SG3_REDL" : \
204 (chip) == UVES_CHIP_REDU ? "FIB_FF_SG3_REDU" : "???")
206 #define FLAMES_FIB_FF_SGC(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_SGC_REDL" : \
207 (chip) == UVES_CHIP_REDU ? "FIB_FF_SGC_REDU" : "???")
209 #define FLAMES_FIB_FF_SG(it, chip) ((it) == 1 ? FLAMES_FIB_FF_SG1(chip) : \
210 (it) == 2 ? FLAMES_FIB_FF_SG2(chip) : \
211 (it) == 3 ? FLAMES_FIB_FF_SG3(chip) : "???")
214 #define FLAMES_FIB_FF_COM(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_COM_REDL" : \
215 (chip) == UVES_CHIP_REDU ? "FIB_FF_COM_REDU" : "???")
217 #define FLAMES_FIB_FF_NOR(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_NOR_REDL" : \
218 (chip) == UVES_CHIP_REDU ? "FIB_FF_NOR_REDU" : "???")
220 #define FLAMES_FIB_FF_NSG(chip) ((chip) == UVES_CHIP_REDL ? "FIB_FF_NSG_REDL" : \
221 (chip) == UVES_CHIP_REDU ? "FIB_FF_NSG_REDU" : "???")
224 #define FIB_FF_ODD_INFO_TAB "FIB_FF_ODD_INFO_TAB"
225 #define FIB_FF_EVEN_INFO_TAB "FIB_FF_EVEN_INFO_TAB"
226 #define FIB_FF_ALL_INFO_TAB "FIB_FF_ALL_INFO_TAB"
232 #define FLAMES_FIB_FF_ALL "FIB_FF_ALL_RED"
233 #define FLAMES_FIB_FF_ODD "FIB_FF_ODD_RED"
234 #define FLAMES_FIB_FF_EVEN "FIB_FF_EVEN_RED"
236 #define FLAMES_CORVEL(chip) ((chip) == UVES_CHIP_REDL ? "CORVEL_TAB_REDL" : \
237 (chip) == UVES_CHIP_REDU ? "CORVEL_TAB_REDU" : "???")
242 #define FLAMES_FIB_SCI_SIM "FIB_SCI_SIM_RED"
245 #define FLAMES_ORDEF(flames, chip) ((flames) ? \
246 (((chip) == UVES_CHIP_REDU) ? "FIB_ORDEF_REDU" : \
247 ((chip) == UVES_CHIP_REDL) ? "FIB_ORDEF_REDL" : \
249 #define FLAMES_ORDEF_EXTENSION(flames, chip) 0
255 #define UVES_FORMATCHECK(flames,blue) ((flames) ? "FIB_ARC_LAMP_FORM_RED" : \
256 ((blue) ? "ARC_LAMP_FORM_BLUE" : "ARC_LAMP_FORM_RED"))
259 #define UVES_ORDER_FLAT(flames, blue) ((flames) ? "FIB_ORDEF_RED" : \
260 ((blue) ? "ORDER_FLAT_BLUE" : "ORDER_FLAT_RED"))
263 #define UVES_BIAS(blue) ((blue) ? "BIAS_BLUE" : "BIAS_RED")
266 #define UVES_DARK(blue) ((blue) ? "DARK_BLUE" : "DARK_RED")
267 #define UVES_PDARK(blue) ((blue) ? "PDARK_BLUE" : "PDARK_RED")
270 #define UVES_FLAT(blue) ((blue) ? "FLAT_BLUE" : "FLAT_RED")
271 #define UVES_IFLAT(blue) ((blue) ? "IFLAT_BLUE" : "IFLAT_RED")
272 #define UVES_DFLAT(blue) ((blue) ? "DFLAT_BLUE" : "DFLAT_RED")
273 #define UVES_SFLAT(blue) ((blue) ? "SFLAT_BLUE" : "SFLAT_RED")
274 #define UVES_TFLAT(blue) ((blue) ? "TFLAT_BLUE" : "TFLAT_RED")
275 #define UVES_SCREEN_FLAT(blue) ((blue) ? "SCREEN_FLAT_BLUE" : "SCREEN_FLAT_RED")
278 #define UVES_ARC_LAMP(flames,blue) ((flames) ? "FIB_ARC_LAMP_RED" : \
279 ((blue) ? "ARC_LAMP_BLUE" : "ARC_LAMP_RED"))
281 #define UVES_ECH_ARC_LAMP(blue) ((blue) ? "ECH_ARC_LAMP_BLUE" : "ECH_ARC_LAMP_RED")
284 #define UVES_CD_ALIGN(blue) ((blue) ? "CD_ALIGN_BLUE" : "CD_ALIGN_RED")
287 #define UVES_STD_STAR(blue) ((blue) ? "STANDARD_BLUE" : "STANDARD_RED")
290 #define UVES_SCIENCE(blue) ((blue) ? "SCIENCE_BLUE" : "SCIENCE_RED")
291 #define UVES_SCI_EXTND(blue) ((blue) ? "SCI_EXTND_BLUE" : "SCI_EXTND_RED")
292 #define UVES_SCI_POINT(blue) ((blue) ? "SCI_POINT_BLUE" : "SCI_POINT_RED")
293 #define UVES_SCI_SLICER(blue) ((blue) ? "SCI_SLICER_BLUE" : "SCI_SLICER_RED")
296 #define UVES_DRS_SETUP(flames, chip) ((flames) ? \
297 (((chip) == UVES_CHIP_REDU) ? "FIB_DRS_REDU" : \
298 ((chip) == UVES_CHIP_REDL) ? "FIB_DRS_REDL" : "???") \
300 (((chip) == UVES_CHIP_BLUE) ? "DRS_SETUP_BLUE" : \
301 ((chip) == UVES_CHIP_REDU) ? "DRS_SETUP_REDU" : \
302 ((chip) == UVES_CHIP_REDL) ? "DRS_SETUP_REDL" : "???"))
304 #define UVES_DRS_SETUP_EXTENSION(chip) 1
307 #define UVES_GUESS_ORDER_TABLE(flames,chip) ((flames) ? \
308 (((chip) == UVES_CHIP_REDU) ? "FIB_ORD_GUE_REDU" : \
309 ((chip) == UVES_CHIP_REDL) ? "FIB_ORD_GUE_REDL" : "???")\
311 (((chip) == UVES_CHIP_BLUE) ? "ORDER_GUESS_TAB_BLUE" : \
312 ((chip) == UVES_CHIP_REDU) ? "ORDER_GUESS_TAB_REDU" : \
313 ((chip) == UVES_CHIP_REDL) ? "ORDER_GUESS_TAB_REDL" : \
318 #define UVES_ORD_TAB(flames,chip) ((flames) ? \
319 (((chip) == UVES_CHIP_REDU) ? "FIB_ORD_TAB_REDU" : \
320 ((chip) == UVES_CHIP_REDL) ? "FIB_ORD_TAB_REDL" : "???")\
322 (((chip) == UVES_CHIP_BLUE) ? "ORDER_TABLE_BLUE" : \
323 ((chip) == UVES_CHIP_REDU) ? "ORDER_TABLE_REDU" : \
324 ((chip) == UVES_CHIP_REDL) ? "ORDER_TABLE_REDL" : \
327 #define UVES_GUESS_ORDER_TABLE_EXTENSION(flames,chip) 1
331 #define UVES_ORDER_TABLE(flames,chip) ((flames) ? \
332 (((chip) == UVES_CHIP_REDU) ? "FIB_ORDEF_TABLE_REDU" : \
333 ((chip) == UVES_CHIP_REDL) ? "FIB_ORDEF_TABLE_REDL" : \
336 (((chip) == UVES_CHIP_BLUE) ? "ORDER_TABLE_BLUE" : \
337 ((chip) == UVES_CHIP_REDU) ? "ORDER_TABLE_REDU" : \
338 ((chip) == UVES_CHIP_REDL) ? "ORDER_TABLE_REDL" : \
340 #define UVES_ORDER_TABLE_EXTENSION 1
341 #define UVES_ORDER_TABLE_EXTENSION_POLY 2
342 #define UVES_ORDER_TABLE_EXTENSION_FIBRE 3
362 #define FLAMES_SCI_INFO_TAB "FIB_SCI_INFO_TAB"
364 #define FLAMES_MWXB_SCI(chip) ( \
365 ((chip) == UVES_CHIP_REDU) ? "MWXB_SCI_REDU" : \
366 ((chip) == UVES_CHIP_REDL) ? "MWXB_SCI_REDL" : \
369 #define FLAMES_ERR_MWXB_SCI(chip) ( \
370 ((chip) == UVES_CHIP_REDU) ? "ERR_MWXB_SCI_REDU" : \
371 ((chip) == UVES_CHIP_REDL) ? "ERR_MWXB_SCI_REDL" : \
375 #define FLAMES_XB_SCI(chip) ( \
376 ((chip) == UVES_CHIP_REDU) ? "XB_SCI_REDU" : \
377 ((chip) == UVES_CHIP_REDL) ? "XB_SCI_REDL" : \
380 #define FLAMES_ERR_XB_SCI(chip) ( \
381 ((chip) == UVES_CHIP_REDU) ? "ERR_XB_SCI_REDU" : \
382 ((chip) == UVES_CHIP_REDL) ? "ERR_XB_SCI_REDL" : \
385 #define FLAMES_WXB_SCI(chip) ( \
386 ((chip) == UVES_CHIP_REDU) ? "WXB_SCI_REDU" : \
387 ((chip) == UVES_CHIP_REDL) ? "WXB_SCI_REDL" : \
390 #define FLAMES_ERR_WXB_SCI(chip) ( \
391 ((chip) == UVES_CHIP_REDU) ? "ERR_WXB_SCI_REDU" : \
392 ((chip) == UVES_CHIP_REDL) ? "ERR_WXB_SCI_REDL" : \
396 #define FLAMES_MWXB_SCI_RAW(chip) ( \
397 ((chip) == UVES_CHIP_REDU) ? "MWXB_SCI_RAW_REDU" : \
398 ((chip) == UVES_CHIP_REDL) ? "MWXB_SCI_RAW_REDL" : \
401 #define FLAMES_ERR_MWXB_SCI_RAW(chip) ( \
402 ((chip) == UVES_CHIP_REDU) ? "ERR_MWXB_SCI_RAW_REDU" : \
403 ((chip) == UVES_CHIP_REDL) ? "ERR_MWXB_SCI_RAW_REDL" : \
407 #define FLAMES_WXB_SCI_RAW(chip) ( \
408 ((chip) == UVES_CHIP_REDU) ? "WXB_SCI_RAW_REDU" : \
409 ((chip) == UVES_CHIP_REDL) ? "WXB_SCI_RAW_REDL" : \
412 #define FLAMES_ERR_WXB_SCI_RAW(chip) ( \
413 ((chip) == UVES_CHIP_REDU) ? "ERR_WXB_SCI_RAW_REDU" : \
414 ((chip) == UVES_CHIP_REDL) ? "ERR_WXB_SCI_RAW_REDL" : \
418 #define FLAMES_XB_SCI_RAW(chip) ( \
419 ((chip) == UVES_CHIP_REDU) ? "XB_SCI_RAW_REDU" : \
420 ((chip) == UVES_CHIP_REDL) ? "XB_SCI_RAW_REDL" : \
423 #define FLAMES_ERR_XB_SCI_RAW(chip) ( \
424 ((chip) == UVES_CHIP_REDU) ? "ERR_XB_SCI_RAW_REDU" : \
425 ((chip) == UVES_CHIP_REDL) ? "ERR_XB_SCI_RAW_REDL" : \
432 #define UVES_BACKGR_TABLE(chip) (((chip) == UVES_CHIP_BLUE) ? "BACKGR_TABLE_BLUE" : \
433 ((chip) == UVES_CHIP_REDU) ? "BACKGR_TABLE_REDU" : \
434 ((chip) == UVES_CHIP_REDL) ? "BACKGR_TABLE_REDL" : "???")
437 #define UVES_MASTER_BIAS(chip) (((chip) == UVES_CHIP_BLUE) ? "MASTER_BIAS_BLUE" : \
438 ((chip) == UVES_CHIP_REDU) ? "MASTER_BIAS_REDU" : \
439 ((chip) == UVES_CHIP_REDL) ? "MASTER_BIAS_REDL" : "???")
440 #define UVES_MASTER_BIAS_EXTENSION(chip) 0
443 #define UVES_MASTER_ARC_FORM(chip) (((chip) == UVES_CHIP_BLUE) ? "MASTER_FORM_BLUE" : \
444 ((chip) == UVES_CHIP_REDU) ? "MASTER_FORM_REDU" : \
445 ((chip) == UVES_CHIP_REDL) ? "MASTER_FORM_REDL" : "???")
447 #define UVES_MASTER_ARC_FORM_EXTENSION(chip) 0
450 #define UVES_MASTER_DARK(chip) (((chip) == UVES_CHIP_BLUE) ? "MASTER_DARK_BLUE" : \
451 ((chip) == UVES_CHIP_REDU) ? "MASTER_DARK_REDU" : \
452 ((chip) == UVES_CHIP_REDL) ? "MASTER_DARK_REDL" : "???")
454 #define UVES_MASTER_PDARK(chip) (((chip) == UVES_CHIP_BLUE) ? "MASTER_PDARK_BLUE": \
455 ((chip) == UVES_CHIP_REDU) ? "MASTER_PDARK_REDU": \
456 ((chip) == UVES_CHIP_REDL) ? "MASTER_PDARK_REDL": "???")
458 #define UVES_MASTER_DARK_EXTENSION(chip) 0
461 #define UVES_MASTER_FLAT(chip) (((chip) == UVES_CHIP_BLUE) ? "MASTER_FLAT_BLUE" : \
462 ((chip) == UVES_CHIP_REDU) ? "MASTER_FLAT_REDU" : \
463 ((chip) == UVES_CHIP_REDL) ? "MASTER_FLAT_REDL" : "???")
464 #define UVES_MASTER_DFLAT(chip) (((chip) == UVES_CHIP_BLUE) ? "MASTER_DFLAT_BLUE" : \
465 ((chip) == UVES_CHIP_REDU) ? "MASTER_DFLAT_REDU" : \
466 ((chip) == UVES_CHIP_REDL) ? "MASTER_DFLAT_REDL" : "???")
467 #define UVES_MASTER_SFLAT(chip) (((chip) == UVES_CHIP_BLUE) ? "MASTER_SFLAT_BLUE" : \
468 ((chip) == UVES_CHIP_REDU) ? "MASTER_SFLAT_REDU" : \
469 ((chip) == UVES_CHIP_REDL) ? "MASTER_SFLAT_REDL" : "???")
470 #define UVES_MASTER_IFLAT(chip) (((chip) == UVES_CHIP_BLUE) ? "MASTER_IFLAT_BLUE" : \
471 ((chip) == UVES_CHIP_REDU) ? "MASTER_IFLAT_REDU" : \
472 ((chip) == UVES_CHIP_REDL) ? "MASTER_IFLAT_REDL" : "???")
473 #define UVES_MASTER_TFLAT(chip) (((chip) == UVES_CHIP_BLUE) ? "MASTER_TFLAT_BLUE" : \
474 ((chip) == UVES_CHIP_REDU) ? "MASTER_TFLAT_REDU" : \
475 ((chip) == UVES_CHIP_REDL) ? "MASTER_TFLAT_REDL" : "???")
476 #define UVES_REF_TFLAT(chip) (((chip) == UVES_CHIP_BLUE) ? "REF_TFLAT_BLUE" : \
477 ((chip) == UVES_CHIP_REDU) ? "REF_TFLAT_REDU" : \
478 ((chip) == UVES_CHIP_REDL) ? "REF_TFLAT_REDL" : "???")
479 #define UVES_MASTER_SCREEN_FLAT(chip) (((chip) == UVES_CHIP_BLUE) ? "MASTER_SCREEN_FLAT_BLUE" : \
480 ((chip) == UVES_CHIP_REDU) ? "MASTER_SCREEN_FLAT_REDU" : \
481 ((chip) == UVES_CHIP_REDL) ? "MASTER_SCREEN_FLAT_REDL" : \
483 #define UVES_MASTER_FLAT_EXTENSION(chip) 0
484 #define UVES_BKG_FLAT(chip) (((chip) == UVES_CHIP_BLUE) ? "BKG_FLAT_BLUE" : \
485 ((chip) == UVES_CHIP_REDU) ? "BKG_FLAT_REDU" : \
486 ((chip) == UVES_CHIP_REDL) ? "BKG_FLAT_REDL" : "???" )
487 #define UVES_RATIO_TFLAT(chip) (((chip) == UVES_CHIP_BLUE) ? "RATIO_TFLAT_BLUE" : \
488 ((chip) == UVES_CHIP_REDU) ? "RATIO_TFLAT_REDU" : \
489 ((chip) == UVES_CHIP_REDL) ? "RATIO_TFLAT_REDL" : "???" )
491 #define UVES_WEIGHTS(chip) ((chip) == UVES_CHIP_REDU ? "WEIGHTS_REDU" : \
492 (chip) == UVES_CHIP_REDL ? "WEIGHTS_REDL" : \
493 (chip) == UVES_CHIP_BLUE ? "WEIGHTS_BLUE" : \
496 #define UVES_LINE_TABLE(flames,chip) ((flames) ? \
497 (((chip) == UVES_CHIP_REDU) ? "FIB_LINE_TABLE_REDU" : \
498 ((chip) == UVES_CHIP_REDL) ? "FIB_LINE_TABLE_REDL" : "???")\
500 (((chip) == UVES_CHIP_BLUE) ? "LINE_TABLE_BLUE" : \
501 ((chip) == UVES_CHIP_REDU) ? "LINE_TABLE_REDU" : \
502 ((chip) == UVES_CHIP_REDL) ? "LINE_TABLE_REDL" : "???"))
505 #define UVES_GUESS_LINE_TABLE(flames,chip) ((flames) ? \
506 (((chip) == UVES_CHIP_REDU) ? "FIB_LIN_GUE_REDU" : \
507 ((chip) == UVES_CHIP_REDL) ? "FIB_LIN_GUE_REDL" : "???")\
509 (((chip) == UVES_CHIP_BLUE) ? "LINE_GUESS_TAB_BLUE" : \
510 ((chip) == UVES_CHIP_REDU) ? "LINE_GUESS_TAB_REDU" : \
511 ((chip) == UVES_CHIP_REDL) ? "LINE_GUESS_TAB_REDL" : "???"))
513 #define UVES_LINE_TABLE_EXTENSION 1
514 #define UVES_LINE_TABLE_EXTENSION_DISPERSION 2
515 #define UVES_LINE_TABLE_EXTENSION_ABSORDER 3
518 #define UVES_LINE_TABLE_MIDAS_BLUE(window) (((window)==1) ? "LINE_TABLE_BLUE1" : \
519 ((window)==2) ? "LINE_TABLE_BLUE2" : \
520 ((window)==3) ? "LINE_TABLE_BLUE3" : \
522 #define UVES_LINE_TABLE_MIDAS_REDL(window) (((window)==1) ? "LINE_TABLE_REDL1" : \
523 ((window)==2) ? "LINE_TABLE_REDL2" : \
524 ((window)==3) ? "LINE_TABLE_REDL3" : \
526 #define UVES_LINE_TABLE_MIDAS_REDU(window) (((window)==1) ? "LINE_TABLE_REDU1" : \
527 ((window)==2) ? "LINE_TABLE_REDU2" : \
528 ((window)==3) ? "LINE_TABLE_REDU3" : \
530 #define UVES_LINE_TABLE_MIDAS(chip,window) ( ((chip) == UVES_CHIP_BLUE) ? \
531 UVES_LINE_TABLE_MIDAS_BLUE(window) : \
532 ((chip) == UVES_CHIP_REDU) ? \
533 UVES_LINE_TABLE_MIDAS_REDU(window) : \
534 ((chip) == UVES_CHIP_REDL) ? \
535 UVES_LINE_TABLE_MIDAS_REDL(window) : "???")
538 #define UVES_INSTR_RESPONSE(chip) (((chip) == UVES_CHIP_BLUE) ? "INSTR_RESPONSE_BLUE" : \
539 ((chip) == UVES_CHIP_REDU) ? "INSTR_RESPONSE_REDU" : \
540 ((chip) == UVES_CHIP_REDL) ? "INSTR_RESPONSE_REDL" : "???")
541 #define UVES_INSTR_RESPONSE_EXTENSION(chip) 0
543 #define UVES_MASTER_RESPONSE(chip) (((chip) == UVES_CHIP_BLUE) ? "MASTER_RESPONSE_BLUE" : \
544 ((chip) == UVES_CHIP_REDU) ? "MASTER_RESPONSE_REDU" : \
545 ((chip) == UVES_CHIP_REDL) ? "MASTER_RESPONSE_REDL" : "???")
546 #define UVES_MASTER_RESPONSE_EXTENSION(chip) 0
548 #define UVES_WCALIB_FF_RESPONSE(chip) (((chip) == UVES_CHIP_BLUE) ? "WCALIB_FF_RESPONSE_BLUE" : \
549 ((chip) == UVES_CHIP_REDU) ? "WCALIB_FF_RESPONSE_REDU" : \
550 ((chip) == UVES_CHIP_REDL) ? "WCALIB_FF_RESPONSE_REDL" : \
552 #define UVES_RED_STD(chip) (((chip) == UVES_CHIP_BLUE) ? "RED_STD_BLUE" : \
553 ((chip) == UVES_CHIP_REDU) ? "RED_STD_REDU" : \
554 ((chip) == UVES_CHIP_REDL) ? "RED_STD_REDL" : "???")
556 #define UVES_RED_NOAPPEND_STD(chip) (((chip) == UVES_CHIP_BLUE) ? "RED_NONMERGED_STD_BLUE" : \
557 ((chip) == UVES_CHIP_REDU) ? "RED_NONMERGED_STD_REDU" : \
558 ((chip) == UVES_CHIP_REDL) ? "RED_NONMERGED_STD_REDL" : "???")
560 #define UVES_BKG_STD(chip) (((chip) == UVES_CHIP_BLUE) ? "BKG_STD_BLUE" : \
561 ((chip) == UVES_CHIP_REDU) ? "BKG_STD_REDU" : \
562 ((chip) == UVES_CHIP_REDL) ? "BKG_STD_REDL" : "???")
564 #define UVES_ORDER_EXTRACT_QC(chip) (((chip) == UVES_CHIP_BLUE) ? "ORDER_EXTRACT_QC_BLUE" : \
565 ((chip) == UVES_CHIP_REDU) ? "ORDER_EXTRACT_QC_REDU" : \
566 ((chip) == UVES_CHIP_REDL) ? "ORDER_EXTRACT_QC_REDL" : "???")
568 #define UVES_EFFICIENCY_TABLE(chip) (((chip) == UVES_CHIP_BLUE) ? "EFFICIENCY_TABLE_BLUE" : \
569 ((chip) == UVES_CHIP_REDU) ? "EFFICIENCY_TABLE_REDU" : \
570 ((chip) == UVES_CHIP_REDL) ? "EFFICIENCY_TABLE_REDL" : "???")
573 #define UVES_CD_ALIGN_TABLE(blue) ((blue) ? "CD_ALIGN_TABLE_BLUE" : "CD_ALIGN_TABLE_RED")
580 #define UVES_LINE_REFER_TABLE "LINE_REFER_TABLE"
581 #define UVES_LINE_REFER_TABLE_EXTENSION 1
583 #define UVES_LINE_INTMON_TABLE "LINE_INTMON_TABLE"
584 #define UVES_LINE_INTMON_TABLE_EXTENSION 1
587 #define UVES_FLUX_STD_TABLE "FLUX_STD_TABLE"
588 #define UVES_FLUX_STD_TABLE_EXTENSION 1
591 #define UVES_EXTCOEFF_TABLE "EXTCOEFF_TABLE"
592 #define UVES_EXTCOEFF_TABLE_EXTENSION 1
598 #define UVES_ALL_STATS (CPL_STATS_MEAN | CPL_STATS_STDEV | CPL_STATS_MEDIAN | \
599 CPL_STATS_MIN | CPL_STATS_MAX)
600 #define DICTIONARY "PRO-1.15"
605 int uves_contains_frames_kind(cpl_frameset * sof,
610 uves_local_filename(
const char *prefix,
enum uves_chip chip,
int trace,
int window);
618 const char *raw_chip_name,
enum uves_chip chip);
621 uves_extract_frames_group_type(
const cpl_frameset * set, cpl_frameset** ext,
622 cpl_frame_group type);
624 uves_frameset_merge(cpl_frameset * set1,
const cpl_frameset* set2);
626 uves_sflats_get_encoder_steps(
const cpl_frameset * set, cpl_table** encoder_tbl,
int* nset);
628 cpl_error_code uves_dfs_set_groups(cpl_frameset *);
636 void *uves_read_midas_array(
const uves_propertylist *plist,
const char *name,
int *length,
637 cpl_type *type,
int *nkeys);
640 const char *regression_name,
646 unsigned stats_mask);
649 uves_frameset_insert(cpl_frameset *frames,
651 cpl_frame_group group,
653 cpl_frame_level level,
654 const char *filename,
659 const cpl_parameterlist *parameters,
661 const char *pipeline,
663 const char *start_time,
665 unsigned stats_mask);
667 int uves_check_rec_status(
const int val) ;
670 uves_save_image_local(
const char *description,
const char *filename_prefix,
671 const cpl_image *image,
672 enum uves_chip chip,
int trace,
int window,
674 bool use_bitpix16_for_int);
676 cpl_error_code uves_save_table_local(
const char *description,
const char *filename_prefix,
677 const cpl_table *table,
678 enum uves_chip chip,
int trace,
int window,
681 cpl_error_code uves_save_polynomial(
polynomial *p,
const char *filename,
684 void uves_save_image(
const cpl_image *image,
const char *filename,
const uves_propertylist *plist,
685 bool use_bitpix16_for_int,
bool save1d);
687 void uves_save_imagelist(
const cpl_imagelist *iml,
const char *filename,
const uves_propertylist *plist);
689 cpl_image *uves_load_image(
const cpl_frame *f,
694 cpl_image *uves_load_image_file(
const char *filename,
702 uves_load_master_formatcheck(
const cpl_frameset *frames,
const char *chip_name,
703 const char **mform_filename,
706 cpl_error_code uves_load_formatcheck(
const cpl_frameset *frames,
708 const char **raw_filename,
709 cpl_image *raw_image[2],
713 cpl_error_code uves_load_orderpos(
const cpl_frameset *frames,
715 const char **raw_filename,
716 cpl_image *raw_image[2],
721 void uves_load_arclamp(
const cpl_frameset *frames,
723 const char **raw_filename,
726 bool *blue,
bool *sim_cal);
728 cpl_error_code uves_load_science(
const cpl_frameset *frames,
const char **raw_filename,
729 cpl_image *raw_image[2],
733 const char **sci_type);
734 cpl_error_code uves_load_standard(
const cpl_frameset *frames,
const char **raw_filename,
737 cpl_error_code uves_load_raw_imagelist(
const cpl_frameset *frames,
739 const char *blue_tag,
740 const char *red_tag, cpl_type type,
746 cpl_error_code uves_load_drs(
const cpl_frameset *frames,
748 const char *chip_name,
749 const char **drs_filename,
751 enum uves_chip chip);
752 cpl_error_code uves_load_mbias(
const cpl_frameset *frames,
const char *chip_id,
753 const char **mbias_filename,
755 enum uves_chip chip);
756 cpl_error_code uves_load_mdark(
const cpl_frameset *frames,
const char *chip_id,
757 const char **mdark_filename,
759 enum uves_chip chip);
760 cpl_error_code uves_load_mflat_const(
const cpl_frameset *frames,
const char *chip_name,
761 const char **mflat_filename,
764 const cpl_frame **mflat_frame);
765 cpl_error_code uves_load_mflat(cpl_frameset *frames,
const char *chip_name,
766 const char **mflat_filename,
769 cpl_frame **mflat_frame);
771 uves_load_weights(
const cpl_frameset *frames,
const char **weights_filename,
772 enum uves_chip chip);
774 void uves_load_ref_flat(
const cpl_frameset *frames,
const char *chip_name,
775 const char **filename, cpl_image **rflat,
778 cpl_error_code uves_load_ordertable(
const cpl_frameset *frames,
781 const char **ordertable_filename,
782 cpl_table **ordertable,
787 int *tab_in_out_oshift,
788 double *tab_in_out_yshift,
794 void uves_load_linetable_const(
const cpl_frameset *frames,
796 const char *chip_name,
798 int minorder,
int maxorder,
799 const char **linetable_filename,
800 const cpl_table **linetable,
804 enum uves_chip chip,
int trace_id,
int window);
806 void uves_load_linetable(
const cpl_frameset *frames,
808 const char *chip_name,
810 int minorder,
int maxorder,
811 const char **linetable_filename,
812 cpl_table **linetable,
816 enum uves_chip chip,
int trace_id,
int window);
818 cpl_error_code uves_load_response_curve(
const cpl_frameset *frames,
const char *chip_name,
819 const char **response_filename,
820 cpl_image **response_curve,
821 cpl_table **master_response,
824 void uves_load_corvel(
const cpl_frameset *frames,
827 const char **corvel_filename);
829 void uves_load_cd_align(
const cpl_frameset *frames,
830 const char **raw_filename1,
831 const char **raw_filename2,
832 cpl_image *raw_image1[2],
833 cpl_image *raw_image2[2],
841 cpl_error_code uves_load_linerefertable(
const cpl_frameset *frames,
842 const char **line_refer_filename,
843 cpl_table **line_refer,
846 cpl_error_code uves_load_lineintmon(
const cpl_frameset *frames,
847 const char **line_intmonr_filename,
848 cpl_table **line_intmon);
850 cpl_error_code uves_load_flux_table(
const cpl_frameset *frames,
const char **flux_table_filename,
851 cpl_table **flux_table);
853 cpl_error_code uves_load_atmo_ext(
const cpl_frameset *frames,
854 const char **atmext_table_filename,
855 cpl_table **atmext_table);
860 char *uves_masterbias_filename(
enum uves_chip chip);
863 char *uves_masterdark_filename(
enum uves_chip chip);
866 char *uves_masterflat_filename(
enum uves_chip chip);
867 char *uves_masterflat_bkg_filename(
enum uves_chip chip);
870 char *uves_ordef_filename(
enum uves_chip chip);
871 char *uves_order_table_filename(
enum uves_chip chip);
872 char *uves_guess_order_table_filename(
enum uves_chip chip);
873 char *uves_guess_line_table_filename(
enum uves_chip chip);
876 char *uves_line_table_filename(
enum uves_chip chip);
877 char *uves_line_table_filename_paf(
enum uves_chip chip);
880 char *uves_response_curve_filename(
enum uves_chip chip);
881 char *uves_response_curve_2d_filename(
enum uves_chip chip);
882 char *uves_response_red_standard_filename(
enum uves_chip chip);
883 char *uves_response_red_noappend_standard_filename(
enum uves_chip chip);
884 char *uves_response_efficiency_filename(
enum uves_chip chip);
885 char *uves_response_bkg_standard_filename(
enum uves_chip chip);
887 char *uves_order_extract_qc_standard_filename(
enum uves_chip chip);
890 char *uves_flat_ratio_filename(
enum uves_chip chip);
893 char *uves_cd_align_filename(
enum uves_chip chip);
896 char *uves_scired_red_science_filename(
enum uves_chip chip);
897 char *uves_scired_red_noappend_science_filename(
enum uves_chip chip);
898 char *uves_scired_red_2d_science_filename(
enum uves_chip chip);
899 char *uves_scired_red_error_filename(
enum uves_chip chip);
900 char *uves_scired_red_noappend_error_filename(
enum uves_chip chip);
901 char *uves_scired_red_2d_error_filename(
enum uves_chip chip);
902 char *uves_scired_fluxcal_science_filename(
enum uves_chip chip);
903 char *uves_scired_fluxcal_science_noappend_filename(
enum uves_chip chip);
904 char *uves_scired_fluxcal_science_2d_filename(
enum uves_chip chip);
905 char *uves_scired_fluxcal_error_filename(
enum uves_chip chip);
906 char *uves_scired_fluxcal_error_noappend_filename(
enum uves_chip chip);
907 char *uves_scired_fluxcal_error_2d_filename(
enum uves_chip chip);
908 char *uves_scired_ff_variance_filename(
enum uves_chip chip);
909 char *uves_scired_ff_variance_2d_filename(
enum uves_chip chip);
910 char *uves_scired_background_filename(
enum uves_chip chip);
911 char *uves_scired_merged_sky_filename(
enum uves_chip chip);
912 char *uves_scired_merged_science_filename(
enum uves_chip chip);
913 char *uves_scired_merged_2d_science_filename(
enum uves_chip chip);
914 char *uves_scired_resampled_filename(
enum uves_chip chip);
915 char *uves_scired_resampled_2d_filename(
enum uves_chip chip);
916 char *uves_scired_resampledmf_filename(
enum uves_chip chip);
917 char *uves_scired_rebinned_filename(
enum uves_chip chip);
918 char *uves_scired_rebinned_error_filename(
enum uves_chip chip);
919 char *uves_scired_rebinned_2d_filename(
enum uves_chip chip);
920 char *uves_scired_rebinned_2d_error_filename(
enum uves_chip chip);
921 char *uves_scired_ordertrace_filename(
enum uves_chip chip);
922 char *uves_scired_wmap_filename(
enum uves_chip chip);
923 char *uves_scired_crmask_filename(
enum uves_chip chip);
924 char *uves_scired_ext2d_filename(
enum uves_chip chip);
925 char *uves_scired_ff2d_filename(
enum uves_chip chip);
927 uves_vector_to_image(
const cpl_vector* vector,cpl_type type);