arithmetic
asynchronous
cell libraries
dsp
low power
low voltage
optimization
power dissipation
superscalar
synthesis
}
@TechReport{Lipsher94b,
author = "J. B. Lipsher and K. Maheswaran",
title = "A 4-Bit Asynchronous Pipelined Multiplier in the
Xilinx 4000 Series {FPGA}",
institution = "U.C.Davis",
year = "1994",
URL = "ftp://ftp.ece.ucdavis.edu/pub/akella/Mult.ps.Z",
}
@Mscthesis{Lipsher0a,
author = "J. B. Lipsher",
title = "The Asynchronous Discrete Cosine Transform Processor
Core",
institution = "U.C.Davis",
URL = "ftp://ftp.ece.ucdavis.edu/pub/akella/JLThesis.ps.Z",
}
@Mscthesis{Maheswaran0a,
author = "K. Maheswaran",
title = "Implementing Self-Timed Circuits in Field Programmable
Gate Arrays",
institution = "U.C.Davis",
URL = "http://www.ece.ucdavis.edu/cerl/maheswar/thesis.html",
}
@TechReport{Maheswaran94a,
author = "K. Maheswaran and V. Akella",
title = "Hazard-free implementation of the self-timed cell set
for the Xilinx 4000 Series {FPGA}",
institution = "U.C.Davis",
year = "1994",
URL = "ftp://ftp.ece.ucdavis.edu/pub/akella/Hazard.ps.Z",
}
@TechReport{Maheswaran94b,
author = "Maheswaran and J. B. Lipsher",
title = "A Cell Set for Self-Timed Design Using Xilinx {XC4000}
Series {FPGA}",
institution = "U.C.Davis",
year = "1994",
URL = "ftp://ftp.ece.ucdavis.edu/pub/akella/Cells.ps.Z",
}
@Article{Marshall94,
author = "Alan Marshall and Bill Coates and Polly Siegel",
title = "Designing an Asynchronous Communications Chip",
journal = ieeedt,
volume = "11",
number = "2",
pages = "8--21",
year = "1994",
URL = "file://snooze.stanford.edu/pub/papers/async/MCS94.ps",
}
@Mscthesis{Mehra92,
author = "R. Mehra",
title = "Micropipelined Cache Design Strategies for an
Asynchronous Microprocessor",
institution = "University of Manchester",
URL = "ftp://ftp.cs.man.ac.uk/pub/amulet/theses/rmehra_msc.ps.Z",
}
@Article{Mehra95,
author = "J. D. Garside R. Mehra",
title = "A Cache Line Fill Circuit for a Micropipelined
Asynchronous Microprocessor",
journal = "IEEE Computer Society TCCA Newsletter",
year = "1995",
URL = "file://ftp.cs.man.ac.uk/pub/amulet/papers/cache_lf.ps.Z",
}
@InProceedings{Myers92,
author = "Chris Myers and Teresa H.-Y. Meng",
title = "Synthesis of Timed Asynchronous Circuits",
pages = "279--282",
booktitle = iccd,
publisher = icsp,
month = oct,
year = "1992",
URL = "file://snooze.stanford.edu/pub/papers/async/MM92.ps",
}
@InProceedings{Myers95,
author = "{C. J. Myers, P. A. Beerel} and T. H.-Y. Meng",
title = "Technology Mapping of Timed Circuits",
booktitle = "Asynchronous Design Methodologies",
series = ifip,
publisher = esp,
month = may,
year = "1995",
URL = "http://jungfrau.usc.edu/pub/london.ps",
}
@TechReport{Negul95,
author = "R. Negulescu",
title = "Process Spaces",
institution = "University of Waterloo",
year = "1995",
URL = "http://maveric0.uwaterloo.ca/Abstracts/Radu.Process.Spaces.html",
}
@TechReport{Negul95,
author = "J. A. Brzozowski R. Negulescu",
title = "Relative Liveness: From Intuition to Automated
Verification",
institution = "University of Waterloo",
year = "1995",
URL = "file://cs-archive.uwaterloo.ca/cs-archive/CS_95_32/CS_95_32.ps.gz",
}
@InProceedings{Nielsen90,
author = "Christian Dalsgaard Nielsen and J\o rgen Staunstrup
and Simon R. Jones",
title = "Potential Performance Advantages of
Delay-Insensitivity",
booktitle = "Proceedings from IFIP workshop on Silicon
Architectures for Neural Nets, StPaul, November 1990",
month = nov,
year = "1990",
URL = "file://ftp.id.dtu.dk/pub/Async/neunet.ps.Z",
}
@InProceedings{Nowick91,
author = "Steven M. Nowick and David L. Dill",
title = "Automatic Synthesis of Locally-Clocked Asynchronous
State Machines",
booktitle = iccad,
publisher = icsp,
pages = "318--321",
month = nov,
year = "1991",
URL = "file://snooze.stanford.edu/pub/papers/async/ND91a.ps",
}
@InProceedings{Nowick91a,
author = "Steven M. Nowick and David L. Dill",
title = "Synthesis of Asynchronous State Machines Using a Local
Clock",
pages = "192--197",
booktitle = iccd,
publisher = icsp,
month = oct,
year = "1991",
URL = "file://snooze.stanford.edu/pub/papers/async/ND91.ps",
}
@InProceedings{Nowick92,
author = "Steven M. Nowick and David L. Dill",
title = "Exact Two-Level Minimization of Hazard-Free Logic with
Multiple-Input Changes",
booktitle = iccad,
publisher = icsp,
month = nov,
year = "1992",
URL = "file://snooze.stanford.edu/pub/papers/async/ND92.ps",
}
@InProceedings{Nowick92a,
author = "Steven M. Nowick and Kenneth Y. Yun and David L.
Dill",
title = "Practical Asynchronous Controller Design",
pages = "341--345",
booktitle = iccd,
publisher = icsp,
month = oct,
year = "1992",
URL = "file://snooze.stanford.edu/pub/papers/async/NYD92.ps",
}
@TechReport{Pastor93,
author = "Enric Pastor and Jordi Cortadella",
title = "{P}-time Unique State Coding Algorithms for Signal
Transition Graphs",
URL = "ftp://gaudi.ac.upc.es/pub/reports/DAC/1994/UPC-DAC-93-13.ps.Z",
}
@TechReport{Nurmi,
author = "Mika Hoffren {Jari Nurmi, Pekka Seppa, Tommi
Raita-aho}",
title = "A High-Speed Self-Timed {FIR} Processor
Implementation",
URL = "http://lenkkari.cs.tut.fi/~async/ps/Self-Timed_VLSI_final.ps.gz",
}
@TechReport{Pastor93a,
author = "Enric Pastor and Jordi Cortadella",
title = "Polynomial Algorithms for Complete State Coding and
Synthesis of Hazard-free Circuits from Signal
Transition Graphs",
URL = "ftp://gaudi.ac.upc.es/pub/reports/DAC/1994/UPC-DAC-93-17.ps.Z",
}
@InProceedings{Pastor94,
author = "Jordi Cortadella {Enric Pastor, Oriol Roig} and Rosa
M. Badia",
title = "Petri net Analysis Using Boolean Manipulation",
booktitle = "15th International Conference on Application and
Theory of Petri Nets",
month = june,
year = "1994",
URL = "ftp://gaudi.ac.upc.es/pub/archives/cad/Papers/PRCB94a.ps.gz",
}
@TechReport{Pastor94a,
author = "Jordi Cortadella Enric Pastor and Oriol Roig",
title = "A new Look at the Conditions for the Synthesis of
Speed-independent Circuits",
URL = "ftp://gaudi.ac.upc.es/pub/reports/DAC/1994/UPC-DAC-94-27.ps.Z",
}
@InProceedings{Paver92,
author = "N. C. Paver and P. Day and S. B. Furber and J. D.
Garside and J. V. Woods",
title = "Register Locking in an Asynchronous Microprocessor",
pages = "351--355",
booktitle = iccd,
publisher = icsp,
month = oct,
year = "1992",
URL = "file://ftp.cs.man.ac.uk/pub/amulet/papers/RegIEEE.ps.Z",
}
@PhdThesis{Paver94,
author = "N. C. Paver",
title = "The Design and Implementation of an Asynchronous
Microprocessor",
school = "Department of Computer Science, University of
Manchester",
month = jun,
year = "1994",
URL = "file://ftp.cs.man.ac.uk/pub/amulet/theses/npaver_phd.ps.Z",
}
@Mscthesis{Petlin94,
author = "O. A. Petlin",
title = "Random Testing of Asynchronous {VLSI} Circuits",
institution = "University of Manchester",
URL = "ftp://ftp.cs.man.ac.uk/pub/amulet/theses/opetlin_msc.ps.Z",
}
@InProceedings{Petlin95,
author = "O. A. Petlin and S. B. Furber",
title = "Scan Testing of Asynchronous Sequential Circuits",
booktitle = "Proceedings: Fifth Great Lakes Symposium on {VLSI}",
month = mar,
year = "1995",
URL = "file://ftp.cs.man.ac.uk/pub/amulet/papers/ScanTestSC.ps.Z",
}
@InProceedings{Petlin95a,
author = "O. A. Petlin and S. B. Furber",
title = "Scan Testing of Micropipelines",
booktitle = "Proceedings: 13th {IEEE VLSI} Test Symposium",
month = may,
year = "1995",
URL = "file://ftp.cs.man.ac.uk/pub/amulet/papers/ScanTestM.ps.Z",
}
@TechReport{Rich94,
author = "William F. Richardson and Erik Brunvand",
title = "The {NSR} Processor Prototype",
URL = "ftp://ftp.cs.utah.edu/techreports/1992/UUCS-92-029.ps.Z",
month = august,
year = "1994",
}
@TechReport{Roig94,
author = "Jordi Cortadella Oriol Roig and Enric Pastor",
title = "Conservative Symbolic Model-Checking of Petri Nets for
Speed-independent Circuit Verification",
URL = "ftp://gaudi.ac.upc.es/pub/reports/DAC/1994/UPC-DAC-94-14.ps.Z",
}
@TechReport{Roig94a,
author = "Jordi Cortadella Oriol Roig and Enric Pastor",
title = "Symbolic model checking of Petri nets for the
verification of speed-independent circuits",
URL = "ftp://gaudi.ac.upc.es/pub/reports/DAC/1994/UPC-DAC-94-26.ps.Z",
}
@TechReport{Roig95,
author = "Jordi Cortadella Oriol Roig and Enric Pastor",
title = "Hierarchical Gate-Level Verification of
Speed-Independent Circuits",
URL = "ftp://gaudi.ac.upc.es/pub/reports/DAC/1995/UPC-DAC-95-01.ps.Z",
}
@TechReport{Sanchez94,
author = "Fermin Sanchez and Jordi Cortadella",
title = "{UNRET}: {A} transformation-based technique for
software pipelining with resource constraints",
URL = "ftp://gaudi.ac.upc.es/pub/reports/DAC/1994/UPC-DAC-94-11.ps.Z",
}
@TechReport{Sanchez95a,
author = "Fermin Sanchez and Jordi Cortadella",
title = "Register Optimization for Maximum Throughput Loop
Pipelining",
institution = "Universitat Politecnica de Catalunya",
year = "1995",
URL = "ftp://gaudi.ac.upc.es/pub/archives/cad/Reports/UPC-DAC-95-10.ps.gz",
}
@TechReport{Sento92,
author = "{E. M. Sentovich, K. J. Singh, L. Lavagno, C. Moon, R.
Murgai, A. Saldanha, H. Savoj, P. R. Stephan, R. K.
Brayton} and A. Sangiovanni-Vincentelli",
title = "{SIS}: {A} system for sequential circuit synthesis",
institution = "U.C. Berkeley",
month = may,
year = "1992",
URL = "http://polimage.polito.it/~lavagno/publications/tr/UCB-ERL-92-41.ps.gz",
}
@InProceedings{Sparso93a,
author = "J. Spars{\o} and C. D. Nielsen and L. S. Nielsen and
J. Staunstrup",
title = "Design of Self-Timed Multipliers: {A} Comparison",
pages = "165--179",
editor = "S. Furber and M. Edwards",
booktitle = "Asynchronous Design Methodologies",
series = ifip,
volume = "A-28",
publisher = esp,
year = "1993",
URL = "file://ftp.id.dtu.dk/pub/Async/manches.ps.Z",
}
@Article{Sparso93b,
author = "Jens Spars{\o} and J{\o}rgen Staunstrup",
title = "Delay-insensitive Multi-ring Structures",
pages = "313--340",
journal = integration,
volume = "15",
number = "3",
month = oct,
year = "1993",
URL = "file://ftp.id.dtu.dk/pub/Async/multir.ps.Z",
}
@Article{Sproull94,
author = "Robert F. Sproull and Ivan E. Sutherland and Charles
E. Molnar",
title = "The Counterflow Pipeline Processor Architecture",
journal = ieeedt,
pages = "48--59",
volume = "11",
number = "3",
year = "1994",
URL = "http://www.sun.com/smli/technical-reports/1994/smli_tr-94-25.ps",
}
@InProceedings{Staunstrup89b,
author = "J\o{}rgen Staunstrup and Mark Greenstreet",
title = "Designing Delay Insensitive Circuits using
{`Synchronized Transitions'}",
booktitle = "Formal {VLSI} Specification and Synthesis. {VLSI}
Design Methods",
volume = "1",
editor = "Luc J. M. Claesen",
publisher = "North-Holland/Elsevier",
pages = "209--226",
year = "1990",
URL = "file://ftp.id.dtu.dk/pub/Async/desdi.ps.Z",
}
@PhdThesis{Stev94,
author = "K. Stevens",
title = "Practical Verification and Synthesis of Asynchronous
Systems",
school = "Department of Computer Science, University of
Calgary",
month = nov,
year = "1994",
URL = "file://ftp.cpsc.ucalgary.ca/pub/users/stevens/stevens-thesis.ps.Z",
}
@InProceedings{Theo95,
author = "J. V. Woods G. Theodoropoulos",
title = "Dealing with Time Modelling Problems in Parallel
Models of Asynchronous Computer Architectures",
pages = "457--472",
booktitle = "Proceedings of the World Transputer Congress",
month = sep,
year = "1995",
URL = "file://ftp.cs.man.ac.uk/pub/amulet/papers/theo_WTC95.ps.Z",
}
@InProceedings{Theo95a,
author = "J. V. Woods G. Theodoropoulos",
title = "Analyzing the Timing Error in Distributed Simulations
of Asynchronous Computer Architectures",
pages = "529--534",
booktitle = "Proceedings of the Eurosim Congress",
month = sep,
year = "1995",
URL = "file://ftp.cs.man.ac.uk/pub/amulet/papers/theo_eurosim95.ps.Z",
}
@PhdThesis{Theo95b,
author = "G. Theodoropoulos",
title = "Strategies for the Modelling and Simulation of
Asynchronous Computer Architectures",
institution = "University of Manchester",
URL = "ftp://ftp.cs.man.ac.uk/pub/amulet/theses/theo95_phd.ps.Z",
}
@Mscthesis{Tierno92,
author = "J. A. Tierno",
title = "Designing asynchronous circuits in Gallium Arsenide",
school = "California Institute of Technology",
year = "1992",
URL = "ftp://ftp.cs.caltech.edu/tr/cs-tr-92-19.ps.Z",
}
@PhdThesis{Tierno95,
author = "J. A. Tierno",
title = "An Energy-Complexity Model for {VLSI} Computations",
school = "California Institute of Technology",
year = "1995",
URL = "ftp://ftp.cs.caltech.edu/tr/cs-tr-95-02.ps.Z",
}
@TechReport{Tierno93,
author = "T. K. Lee {J.A. Tierno, A.J. Martin, D.Borkovic}",
title = "An asynchronous microprocessor in Gallium Arsenide",
year = "1993",
URL = "ftp://ftp.cs.caltech.edu/tr/cs-tr-93-38.ps.Z",
}
@InProceedings{Tierno96,
author = "A. J. Martin {J.A. Tierno, R. Manohar}",
title = "The Energy and Entropy of {VLSI} Computations",
booktitle = "Proc. Second International Symposium on Advanced
Research in Asynchronous Circuits and Systems",
month = mar,
year = "1996",
URL = "http://www.cs.caltech.edu/~rajit/ps/energy.ps.gz",
}
@Mscthesis{York94,
author = "R. York",
title = "Branch Prediction Strategies for Low Power
Microprocessor Design",
institution = "University of Manchester",
URL = "ftp://ftp.cs.man.ac.uk/pub/amulet/theses/RYthesis.ps.gz",
}
@InProceedings{Yun92,
author = "Kenneth Y. Yun and David L. Dill and Steven M.
Nowick",
title = "Synthesis of {3D} Asynchronous State Machines",
pages = "346--350",
booktitle = iccd,
publisher = icsp,
month = oct,
year = "1992",
URL = "file://snooze.stanford.edu/pub/papers/async/YDN92.ps",
}
@InProceedings{Yun92a,
author = "Kenneth Y. Yun and David L. Dill",
title = "Automatic Synthesis of {3D} Asynchronous State
Machines",
pages = "576--580",
booktitle = iccad,
publisher = icsp,
month = nov,
year = "1992",
URL = "file://snooze.stanford.edu/pub/papers/async/YD92.ps",
}
@InProceedings{Yun93,
author = "Kenneth Y. Yun and David L. Dill and Steven M.
Nowick",
title = "Practical Generalizations of Asynchronous State
Machines",
pages = "525--530",
booktitle = edac,
publisher = icsp,
month = feb,
year = "1993",
URL = "file://snooze.stanford.edu/pub/papers/async/YDN93.ps",
}
@Article{Furber96a,
author = "Stephen B. Furber and Paul Day",
title = "Four-Phase Micropipeline Latch Control Circuits",
pages = "247--253",
journal = ieeevlsi,
volume = "4",
number = "2",
month = jun,
year = "1996",
URL = "file://ftp.cs.man.ac.uk/pub/amulet/papers/4phCtl.ps.gz",
}
@InProceedings{Garside96,
author = "J. D. Garside and S. Temple and R. Mehra",
title = "The {AMULET2e} Cache System",
booktitle = async,
publisher = icsp,
month = mar,
year = "1996",
URL = "file://ftp.cs.man.ac.uk/pub/amulet/papers/async96_cache.ps.gz",
}
}
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@String{cacm = "Communications of the ACM"}
@String{dc = "Distributed Computing"}
@String{eatcs = "Bull. EATCS"}
@String{el = "Electronics Letters"}
@String{fmsd = "Formal Methods in System Design"}
@String{faoc = "Formal Aspects of Computing"}
@String{ieicetf = "IEICE Transactions on Fundamentals of Electronics
Communications and Computer Sciences"}
@String{ieicetis = "IEICE Transactions on Information and Systems"}
@String{ieepcds = "IEE Proceedings, Circuits, Devices and Systems"}
@String{ieepcdt = "IEE Proceedings, Computers and Digital Techniques"}
@String{ieeedt = "IEEE Design \& Test of Computers"}
@String{ieeejssc = "IEEE Journal of Solid-State Circuits"}
@String{ieeeproc = "Proceedings of the IEEE"}
@String{ieeetas = "IEEE Transactions on Applied Superconductivity"}
@String{ieeetc = "IEEE Transactions on Computers"}
@String{ieeetcad = "IEEE Transactions on Computer-Aided Design"}
@String{ieeetcsi = "IEEE Transactions on Circuits and Systems I:
Fundamental Theory and Applications"}
@String{ieeetec = "IEEE Transactions on Electronic Computers"}
@String{ieeetsp = "IEEE Transactions on Signal Processing"}
@String{ieeevlsi = "IEEE Transactions on VLSI Systems"}
@String{ieeemicro = "IEEE Micro"}
@String{integration = "Integration, the VLSI journal"}
@String{ije = "Int. Journal Electronics"}
@String{ipl = "Information Processing Letters"}
@String{jacm = "Journal of the ACM"}
@String{jetta = "Journal of Electronic Testing: Theory and
Applications"}
@String{jcss = "Journal of Computer and System Sciences"}
@String{tcca = "IEEE Technical Committee on Computer Architecture
Newsletter"}
@String{tcs = "Theoretical Computer Science"}
@String{vlsisp = "Journal of VLSI Signal Processing"}
% @COMMENT{ ==================================================================== }
}
% @COMMENT{ Predefined publishers }
}
% @COMMENT{ ==================================================================== }
}
@String{ap = "Academic Press"}
@String{aw = "Addison-Wesley"}
@String{csp = "Computer Science Press"}
@String{cwi = "CWI"}
@String{esp = "Elsevier Science Publishers"}
@String{icsp = "IEEE Computer Society Press"}
@String{ieee = "IEEE Press"}
@String{ios = "IOS Press"}
@String{kap = "Kluwer Academic Publishers"}
@String{mit = "MIT Press"}
@String{ph = "Prentice-Hall"}
@String{springer = "Springer-Verlag"}
@String{wiley = "John Wiley \& Sons"}
% @COMMENT{ ==================================================================== }
}
% @COMMENT{ Predefined institutions }
}
% @COMMENT{ ==================================================================== }
}
@String{caltech = "California Institute of Technology"}
@String{eut = "Dept. of Math. and C.S., Eindhoven Univ. of
Technology"}
@String{southbank = "School of Computing, Information Systems and
Mathematics, South Bank University, London"}
@String{su = "Stanford University"}
@String{sucsl = "Computer Systems Laboratory, Stanford University"}
@String{mucs = "Manchester University, Dept. of Computer Science"}
@String{berk = "University of California, Berkeley, USA"}
@String{nclcl = "University of Newcastle Upon Tyne, Computing
Laboratory"}
% @COMMENT{ ==================================================================== }
}
% @COMMENT{ Predefined series }
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% @COMMENT{ ==================================================================== }
}
@String{csn = "Computing Science Notes"}
@String{ifip = "IFIP Transactions"}
@String{lncs = "Lecture Notes in Computer Science"}
@String{mctracts = "Mathematical Centre Tracts"}
@String{wic = "Workshops in Computing"}
% @COMMENT{ ==================================================================== }
}
% @COMMENT{ Predefined conference proceedings }
}
% @COMMENT{ ==================================================================== }
}
@String{acsd = "Int. Conf. on Application of Concurrency to System
Design"}
@String{adm = "Asynchronous Design Methodologies"}
@String{apchdl = "Asia-Pacific Conference on Hardware Description
Languages (APCHDL)"}
@String{arvlsi = "Advanced Research in VLSI"}
@String{aspdac = "Proc. of Asia and South Pacific Design Automation
Conference"}
@String{async = "Proc. International Symposium on Advanced Research in
Asynchronous Circuits and Systems"}
@String{cav = "Proc. International Workshop on Computer Aided
Verification"}
@String{custom = "Proc. IEEE Custom Integrated Circuits Conference"}
@String{dac = "Proc. ACM/IEEE Design Automation Conference"}
@String{date = "Proc. Design, Automation and Test in Europe (DATE)"}
@String{dcc = "Designing Correct Circuits"}
@String{edac = "Proc. European Conference on Design Automation
(EDAC)"}
@String{edtc = "Proc. European Design and Test Conference"}
@String{eurodac = "Proc. European Design Automation Conference
(EURO-DAC)"}
@String{esscirc = "Proc. European Solid-State Circuits Conference
(ESSCIRC)"}
@String{ftcs = "International Symposium on Fault-Tolerant Computing
(FTCS)"}
@String{glsvlsi = "Proc. of the Great Lakes Symposium on VLSI"}
@String{hicss = "Proc. Hawaii International Conf. System Sciences"}
@String{iccad = "Proc. International Conf. Computer-Aided Design
(ICCAD)"}
@String{iccd = "Proc. International Conf. Computer Design (ICCD)"}
@String{icpp = "Proc. International Conference on Parallel
Processing"}
@String{iscas = "Proc. International Symposium on Circuits and
Systems"}
@String{ishls = "Proc. International Symposium on High-Level
Synthesis"}
@String{isscc = "International Solid State Circuits Conference"}
@String{itc = "Proc. International Test Conference"}
@String{ivlsi = "Proc. International Conference on VLSI Design"}
@String{iwls = "Proc. International Workshop on Logic Synthesis"}
@String{midwest = "Proc. of the Midwest Symposium on Circuits and
Systems"}
@String{patmos = "Power and Timing Modeling, Optimization and Simulation
(PATMOS)"}
@String{prorisc = "Proc. of the {IEEE/ProRISC} Symposium on Circuits,
Systems and Signal Processing"}
@String{ssat = "Annual Symposium on Switching and Automata Theory"}
@String{tau = "Proc. International Workshop on Timing Issues in the
Specification and Synthesis of Digital Systems (TAU)"}
@String{vts = "Proc. IEEE VLSI Test Symposium"}
@String{ta = "(To appear)"}
@Article{Abra83,
author = "M. Abramovici and Y. H. Levendel and P. R. Menon",
title = "A Logic Simulation Machine.",
journal = "IEEE Transactions on Computer-Aided Design of
Integrated Circuits and Systems",
volume = "CAD-2",
number = "2",
pages = "82--94",
month = apr,
year = "1983",
fileno = "1",
}
@Article{Afgh90,
author = "M. Afghahi and C. Svensson",
title = "A Unified Single-Phase Clocking Scheme for {VLSI}
System.",
journal = ieeejssc,
volume = "25",
number = "1",
pages = "225--233",
month = feb,
year = "1990",
fileno = "205",
}
@Article{Afgh92,
author = "M. Afghahi and C. Svensson",
title = "Performance of Synchronous and Asynchronous Schemes
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